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20-12-14, 11:43 PM
Cadence MMSIM 13.11.049 Update Only (20.12.2014)
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Cadence MMSIM 13.11.049 Update Only | 2.6 GB
Cadence Design Systems, Inc., the leader in global electronic-design innovation, unveiled update Cadence Virtuoso Multi-Mode Simulation (release MMSIM 13.11), the electronic design industry's first end-to-end simulation and verification solution for custom IC that uses a common, fully integrated database of netlists and models to simulate analog, RF, memory, and mixed-signal designs and design blocks.
This breakthrough allows designers to switch from one simulation engine to another without compatibility issues or interpretation impacts, so consistency, accuracy, and design coverage are improved, while cycle time and risk are reduced. The overall result is lower cost of adoption, support, and ownership, and faster time to market.
Virtuoso Multi-Mode Simulation is tightly integrated with the new Virtuoso custom design environment, enabling a complete design-to-verification methodology. In addition, Virtuoso Multi-Mode Simulation provides an innovative and cost-efficient token-based licensing model that allows designers to optimize their usage of different simulation technologies. This model significantly reduces the adoption and support costs typically associated with using multiple simulation technologies from different vendors.
Fixed CCRS in MMSIM 13.11
812000 SPECTRE Problem in saving current while using "subcktprobelvl and useprobes" with inline subckts
1129787 SPECTRE Provide an option to support block-level RC reduction
1224150 SPECTRE Using dyn_highz with alter statement gives wrong nodes
1226735 SPECTRE Spectre Monte Carlo simulation generates wrong scalar file results if relative path is specified
1236875 SPECTRE APS ms mode causes convergence error
1239974 SPECTRE dyn_floatdcpath: change leakage-path detection to current-based
1241125 SPECTRE APS creating incomplete writefinal
1241179 SPECTRE Incorrect vth op calculation for hsim_hv models with non-zero Vbs
1241907 SPECTRE The Verilog-A directive "include" should accept "macro" as an argument
1242810 SPECTRE Using string replication with 0 replications produces incorrect string
1245973 SPECTRE APS EMIR simulation hangs
1249077 SPECTRE Change the output directory of circuit checks report
1249425 SPECTRE spfchecker fails with blackbox DSPF
1250976 SPECTRE Spectre needs to give more descriptive message when monte carlo analysis ends due to $stop
1252466 SPECTRE mvarsearch should use the integer parameter
1262759 SPECTRE Remove the internal rcr_control option from documentation
848746 SPECTRERF MonteCarlo APS-HB crashes on machines with insufficient memory
1042274 SPECTRERF PSS with Nport shows GIBBS effect
1061416 SPECTRERF Enhance Spectre to support rfm file
1068348 SPECTRERF Error is detected in file wbCreate.c during Spectre pss harmonic balance simulation
1192439 SPECTRERF Request to support Rational Function Matrix (.rfm) in Spectre
1197484 SPECTRERF Need a way to estimate the amount of memory/ram needed prior to spectreRF run.
1204677 SPECTRERF Non-physical behavior with S-parameters.s20p in transient
1240740 ULTRASIM UltraSim .dcheck ignores the second time window
1250517 ULTRASIM UltraSim crashes after adding release interactive command
1123513 XPS Enhance APS/XPS dcpath and floatdcpath checks to support virtual power supplies
1123514 XPS Add PWL source support for all XPS static checks
1123518 XPS Enhance XPS static check to report vmin/vmax voltage
1123523 XPS XPS static checks to read vmin/vmax values from previous checks
1198851 XPS XPS shows skipped instances in the waveform database
1214690 XPS Enhance XPS to support UltraSim text format for ERC checks
1247294 XPS "FATAL (MDL-128) error" is triggered by "-format fsdb" and ".data"
About Cadence Design Systems, Inc.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
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Cadence MMSIM 13.11.049 Update Only | 2.6 GB
Cadence Design Systems, Inc., the leader in global electronic-design innovation, unveiled update Cadence Virtuoso Multi-Mode Simulation (release MMSIM 13.11), the electronic design industry's first end-to-end simulation and verification solution for custom IC that uses a common, fully integrated database of netlists and models to simulate analog, RF, memory, and mixed-signal designs and design blocks.
This breakthrough allows designers to switch from one simulation engine to another without compatibility issues or interpretation impacts, so consistency, accuracy, and design coverage are improved, while cycle time and risk are reduced. The overall result is lower cost of adoption, support, and ownership, and faster time to market.
Virtuoso Multi-Mode Simulation is tightly integrated with the new Virtuoso custom design environment, enabling a complete design-to-verification methodology. In addition, Virtuoso Multi-Mode Simulation provides an innovative and cost-efficient token-based licensing model that allows designers to optimize their usage of different simulation technologies. This model significantly reduces the adoption and support costs typically associated with using multiple simulation technologies from different vendors.
Fixed CCRS in MMSIM 13.11
812000 SPECTRE Problem in saving current while using "subcktprobelvl and useprobes" with inline subckts
1129787 SPECTRE Provide an option to support block-level RC reduction
1224150 SPECTRE Using dyn_highz with alter statement gives wrong nodes
1226735 SPECTRE Spectre Monte Carlo simulation generates wrong scalar file results if relative path is specified
1236875 SPECTRE APS ms mode causes convergence error
1239974 SPECTRE dyn_floatdcpath: change leakage-path detection to current-based
1241125 SPECTRE APS creating incomplete writefinal
1241179 SPECTRE Incorrect vth op calculation for hsim_hv models with non-zero Vbs
1241907 SPECTRE The Verilog-A directive "include" should accept "macro" as an argument
1242810 SPECTRE Using string replication with 0 replications produces incorrect string
1245973 SPECTRE APS EMIR simulation hangs
1249077 SPECTRE Change the output directory of circuit checks report
1249425 SPECTRE spfchecker fails with blackbox DSPF
1250976 SPECTRE Spectre needs to give more descriptive message when monte carlo analysis ends due to $stop
1252466 SPECTRE mvarsearch should use the integer parameter
1262759 SPECTRE Remove the internal rcr_control option from documentation
848746 SPECTRERF MonteCarlo APS-HB crashes on machines with insufficient memory
1042274 SPECTRERF PSS with Nport shows GIBBS effect
1061416 SPECTRERF Enhance Spectre to support rfm file
1068348 SPECTRERF Error is detected in file wbCreate.c during Spectre pss harmonic balance simulation
1192439 SPECTRERF Request to support Rational Function Matrix (.rfm) in Spectre
1197484 SPECTRERF Need a way to estimate the amount of memory/ram needed prior to spectreRF run.
1204677 SPECTRERF Non-physical behavior with S-parameters.s20p in transient
1240740 ULTRASIM UltraSim .dcheck ignores the second time window
1250517 ULTRASIM UltraSim crashes after adding release interactive command
1123513 XPS Enhance APS/XPS dcpath and floatdcpath checks to support virtual power supplies
1123514 XPS Add PWL source support for all XPS static checks
1123518 XPS Enhance XPS static check to report vmin/vmax voltage
1123523 XPS XPS static checks to read vmin/vmax values from previous checks
1198851 XPS XPS shows skipped instances in the waveform database
1214690 XPS Enhance XPS to support UltraSim text format for ERC checks
1247294 XPS "FATAL (MDL-128) error" is triggered by "-format fsdb" and ".data"
About Cadence Design Systems, Inc.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.
DOWNLOAD LINKS:
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